AI chip · Huawei
Huawei Ascend 910C
Follow-on to 910B (2024), targeting ~60% of H100 training throughput on Da Vinci 3.0. Volume production ramping despite HBM supply constraints from Samsung/SK Hynix export restrictions.
Market position
The chip Huawei built by dual-packaging two 910B dies. 2x 910B FP16 throughput, positioned against H100. Powers CloudMatrix 384 (Huawei's rack-scale answer to NVL72) shipping into Chinese hyperscalers under export-control conditions.
Efficiency and power
How much work you get per watt and per dollar, and how much power a full rack draws.
- Perf per watt
- 1.60 FP16 TFLOPS/W800 TFLOPS ÷ 500 W = 1.60
What fits in 128 GB
Which open-source LLMs run on one Huawei Ascend 910C, by precision. Weights only: add roughly 15% headroom for real serving. If a model does not fit at FP16, try INT8 or INT4 (smaller quality trade-off than most people expect).
| Model | Params | FP16 | INT8 | INT4 |
|---|---|---|---|---|
| Llama 3.1 8B dense | 8 B | 16 GB ✓ | 8 GB ✓ | 4 GB ✓ |
| Llama 3.1 70B dense | 70 B | 140 GB ✗ | 70 GB ✓ | 35 GB ✓ |
| Llama 3.1 405B dense | 405 B | 810 GB ✗ | 405 GB ✗ | 203 GB ✗ |
| Llama 3.3 70B dense | 70 B | 140 GB ✗ | 70 GB ✓ | 35 GB ✓ |
| DeepSeek V3 MoE (671B total, 37B active per token) | 671 B | 1342 GB ✗ | 671 GB ✗ | 336 GB ✗ |
| DeepSeek R1 MoE (671B total, 37B active per token) | 671 B | 1342 GB ✗ | 671 GB ✗ | 336 GB ✗ |
| Qwen 2.5 7B dense | 7 B | 14 GB ✓ | 7 GB ✓ | 4 GB ✓ |
| Qwen 2.5 72B dense | 72 B | 144 GB ✗ | 72 GB ✓ | 36 GB ✓ |
| Mixtral 8x7B MoE (46.7B total, 12.9B active per token) | 46.7 B | 93 GB ✓ | 47 GB ✓ | 23 GB ✓ |
| Mixtral 8x22B MoE (141B total, 39B active per token) | 141 B | 282 GB ✗ | 141 GB ✗ | 71 GB ✓ |
| Gemma 2 27B dense | 27 B | 54 GB ✓ | 27 GB ✓ | 14 GB ✓ |
| Command R+ dense | 104 B | 208 GB ✗ | 104 GB ✓ | 52 GB ✓ |
| Kimi K2 MoE (1T total, 32B active per token) | 1000 B | 2000 GB ✗ | 1000 GB ✗ | 500 GB ✗ |
Math: FP16 = params × 2 bytes; INT8 = params × 1 byte; INT4 = params × 0.5 bytes. MoE models sum every expert (full weights on disk), not the per-token active subset.
Common questions
How much does Huawei Ascend 910C cost?
Huawei Ascend 910C doesn't have a public launch list price. Vendors like this one usually price through direct sales rather than a public sheet. See list price per TFLOP for chips that do publish.
How much memory does Huawei Ascend 910C have?
128 GB of HBM2e, running at 3,200 GB/s. Straight from the vendor datasheet. See chips with the most memory for context.
How much power does one Huawei Ascend 910C draw?
500 W at the chip. A full server draws more once you add CPU, memory, networking and cooling: see the rack power number above. Compare to other chips on perf-per-watt.
Which open-source LLMs fit on one Huawei Ascend 910C?
Of 13 open-source LLMs we track, 4 fit at FP16, 8 at INT8, and 9 at INT4 (for example Llama 3.1 8B, Llama 3.1 70B and Llama 3.3 70B). Full table above with each model's memory need.
Key facts
- Class
- Compute SoC (AI accelerator)
- Designer
- Huawei
- Safety-critical?
- No (data-center inference / training)
- Record as of
- 2026-09-27
Specifications (9 fields, click to expand)
Straight from the vendor datasheet. Dense throughput shown first; sparse (2:4) numbers in parentheses where the vendor publishes them. Full datasheet linked below.
- Process node
- SMIC N+2 (~7nm)
- TDP
- 500 W
- Memory
- 128 GB HBM2e
- Memory bandwidth
- 3,200 GB/s
- FP16 (dense)
- 800 TFLOPS
- INT8 (dense)
- 1,600 TOPS
- Form factor
- OAM
- Announced
- 2024-09-19
- Released
- 2025-01-01
Source: vendor datasheet
Generation
Foundry & process
- Fabbed at
- SMIC (all chips SMIC makes →)
- Process node
- SMIC N+2 (~7nm)
Compare with
Sources
Adoption rows appear as we confirm each chip-in-robot pairing from a public source. See every chip we track for the full catalog or the Huawei page.