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AI chip · AMD

AMD Instinct MI325X

CDNA 3 refresh of MI300X with 256 GB HBM3e; announced late 2024. Bridge product before the MI350 series.

Part of 1 rack design.

Market position

MI325X is MI300X's memory refresh: 256 GB HBM3e at 6 TB/s. AMD's inference-per-dollar pitch to hyperscalers heading into 2025, positioned against H200. HUMAIN committed to it publicly.

Efficiency and power

How much work you get per watt and per dollar, and how much power a full rack draws.

Perf per watt
2.61 FP8 TFLOPS/W
2,614 TFLOPS ÷ 1000 W = 2.61
Rack power
8 kW per AMD Instinct MI325X Platform (8-GPU OAM baseboard) (~1000 W per chip)
8 kW ÷ 8 chips (whole-system, includes CPU, memory, NICs, cooling)
Cooling
air
Depends on the rack design

What fits in 256 GB

Which open-source LLMs run on one AMD Instinct MI325X, by precision. Weights only: add roughly 15% headroom for real serving. If a model does not fit at FP16, try INT8 or INT4 (smaller quality trade-off than most people expect).

ModelParamsFP16INT8INT4
Llama 3.1 8B
dense
8 B16 GB ✓8 GB ✓4 GB ✓
Llama 3.1 70B
dense
70 B140 GB ✓70 GB ✓35 GB ✓
Llama 3.1 405B
dense
405 B810 GB ✗405 GB ✗203 GB ✓
Llama 3.3 70B
dense
70 B140 GB ✓70 GB ✓35 GB ✓
DeepSeek V3
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
DeepSeek R1
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
Qwen 2.5 7B
dense
7 B14 GB ✓7 GB ✓4 GB ✓
Qwen 2.5 72B
dense
72 B144 GB ✓72 GB ✓36 GB ✓
Mixtral 8x7B
MoE (46.7B total, 12.9B active per token)
46.7 B93 GB ✓47 GB ✓23 GB ✓
Mixtral 8x22B
MoE (141B total, 39B active per token)
141 B282 GB ✗141 GB ✓71 GB ✓
Gemma 2 27B
dense
27 B54 GB ✓27 GB ✓14 GB ✓
Command R+
dense
104 B208 GB ✓104 GB ✓52 GB ✓
Kimi K2
MoE (1T total, 32B active per token)
1000 B2000 GB ✗1000 GB ✗500 GB ✗

Math: FP16 = params × 2 bytes; INT8 = params × 1 byte; INT4 = params × 0.5 bytes. MoE models sum every expert (full weights on disk), not the per-token active subset.

Common questions

How much does AMD Instinct MI325X cost?

AMD Instinct MI325X doesn't have a public launch list price. Vendors like this one usually price through direct sales rather than a public sheet. See list price per TFLOP for chips that do publish.

How much memory does AMD Instinct MI325X have?

256 GB of HBM3e, running at 6,000 GB/s. Straight from the vendor datasheet. See chips with the most memory for context.

How much power does one AMD Instinct MI325X draw?

1000 W at the chip. A full server draws more once you add CPU, memory, networking and cooling: see the rack power number above. Compare to other chips on perf-per-watt.

Which open-source LLMs fit on one AMD Instinct MI325X?

Of 13 open-source LLMs we track, 8 fit at FP16, 9 at INT8, and 10 at INT4 (for example Llama 3.1 8B, Llama 3.1 70B and Llama 3.1 405B). Full table above with each model's memory need.

See every answer we publish →

Key facts

Class
Compute SoC (AI accelerator)
Designer
AMD
Safety-critical?
No (data-center inference / training)
Record as of
2026-09-27
Most recent source
2024-10-01 (across 1 source on this page)
Specifications (10 fields, click to expand)

Straight from the vendor datasheet. Dense throughput shown first; sparse (2:4) numbers in parentheses where the vendor publishes them. Full datasheet linked below.

Process node
TSMC N5 + N6 (chiplet)
TDP
1000 W
Memory
256 GB HBM3e
Memory bandwidth
6,000 GB/s
FP16 (dense)
1,307 TFLOPS
FP8 (dense)
2,614 TFLOPS
INT8 (dense)
2,614 TOPS
Form factor
OAM
Announced
2024-10-10
Released
2025-01-01

Source: vendor datasheet

Generation

Foundry & process

Fabbed at
TSMC (all chips TSMC makes →)
Process node
TSMC N5 + N6 (chiplet)

Rack designs that use it

Whole-rack systems buyers order in bulk (NVL72, HGX, TPU pods) that ship with AMD Instinct MI325X inside.

See all rack designs →

Compare with

See every chip comparison →

Benchmarks

Published performance numbers by workload. Vendor datasheet figures where noted; independent measurements otherwise.

WorkloadValueUnitSourceAs of
memory capacity256GB HBM3evendor2024-10-01

Sources

Adoption rows appear as we confirm each chip-in-robot pairing from a public source. See every chip we track for the full catalog or the AMD page.